View DG643DJ_97676.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

DG641/642/643
Vishay Siliconix
Low On-Resistance Wideband/Video Switches
FEATURES
D D D D D D D Wide Bandwidth: 500 MHz Low Crosstalk at 5 MHz: -85 dB Low rDS(on): 5 W , DG642 TTL Logic Compatible Fast Switching: tON 50 ns Single Supply Compatibility High Current: 100 mA, DG642
BENEFITS
D D D D D D High Precision Improved Frequency Response Low Insertion Loss Improved System Performance Reduced Board Space Low Power Consumption
APPLICATIONS
D D D D D D D D RF and Video Switching RGB Switching Video Routing Cellular Communications ATE Radar/FLIR Systems Satellite Receivers Programmable Filters
DESCRIPTION
The DG641/642/643 are high performance monolithic video switches designed for switching wide bandwidth analog and digital signals. DG641 is a quad SPST, DG642 is a single SPDT, and DG643 is a dual SPDT function. These devices have exceptionally low on-resistances (5 W typ--DG642), low capacitance and high current handling capability. To achieve TTL compatibility, low channel capacitances and fast switching times, the DG641/642/643 are built on the Vishay Siliconix proprietary D/CMOS process. Each switch conducts equally well in both directions when on, and blocks up to 14 Vp-p when off. An epitaxial layer prevents latchup.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Dual-In-Line and SOIC IN1 D1 S1 V- GND S4 D4 IN4 1 2 3 4 DG641 5 6 7 8 Top View 16 IN2 15 D2 14 S2 13 V+ 12 GND 11 S3 10 D3 9 IN3
S1 D1 V- GND 1 2 3 4 Dual-In-Line and SOIC IN1 D1 GND 8 7 6 IN S1 V+ V- D2 S4 S2 GND D4 1 2 3 4 5 6 7 8 Dual-In-Line and SOIC IN2 D2 GND S2 V+ S3 GND D3
16 15 14 13 12 11 10
DG642
Top View
5
DG643
Top View
9
TRUTH TABLE
Logic
0 1
DG641
Switch
OFF ON
TRUTH TABLE
Logic
0 1
DG642
SW2
ON OFF
TRUTH TABLE
Logic
0 1
DG643
SW3, SW4
ON OFF
SW1
OFF ON Logic "0" v 0.8 V Logic "1" w 2.4 V
SW1, SW2
OFF ON Logic "0" v 0.8 V Logic "1" w 2.4 V
Logic "0" v 0.8 V Logic "1" w 2.4 V Document Number: 70058 S-52433--Rev. E, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-1
DG641/642/643
Vishay Siliconix
ORDERING INFORMATION
Temp Range DG641
16-Pin Plastic DIP -40 to 85_C 16-Pin Narrow SOIC DG641DJ DG641DY
Package
Part Number
DG642
8-Pin Plastic DIP -40 to 85_C 8-Pin Narrow SOIC DG642DJ DG642DY
DG643
-40 to 85_C 85 C 16-Pin Plastic DIP 16-Pin Narrow SOIC DG643DJ DG643DY
ABSOLUTE MAXIMUM RATINGS
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 21 V V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 21 V V- to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -19 V to +0.3 V Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -0.3 V to (V+) +0.3 V or 20 mA, whichever occurs first VS, VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -0.3 V to (V-) +14 V or 20 mA, whichever occurs first Continuous Current (Any Terminal Except S or D) . . . . . . . . . . . . . . . . 20 mA Continuous Current S or D: DG641/643 . . . . . . . . . . . . . . . . . . . . . . . 75 mA DG642 . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Current, S or D (Pulsed 1 ms, 10% duty cycle max) DG641/643 . . . . . . . . . . . . . . . . . . . . . . 200 mA DG642 . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 7.6 mW/_C above 75_C d. Derate 6 mW/_C above 75_C e. Derate 80 mW/_C above 75_C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 125_C Power Dissipation (Package)b 8-Pin Plastic DIP and Narrow SOICc . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mW 16-Pin Plastic DIPd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW 16-Pin Narrow SOICe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+ 5V Reg S
GND
IN
D
V-
FIGURE 1.
www.vishay.com S FaxBack 408-970-5600
4-2
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
DG641/642/643
Vishay Siliconix
SPECIFICATIONS FOR DG641 AND DG643
Test Conditions Unless Otherwise Specified Parameter Analog Switch
Analog Signal Rangedd VANALOG rDS(on) DrDS(on) IS(off) ID(off) ID(on) VS = 0 V, VD = 10 V VS = 10 V, VD = 0V VS = VD = 0 V V- = -5 V, V+ = 12 V V- = GND, V+ = 12 V Full Full Room Full Room Room Full Room Full Room Full -10 -100 -10 -100 -10 -100 -5 0 8 1 -0.02 -0.02 -0.1 8 8 15 20 2 10 100 10 100 10 100 nA A W V
Limits
-40 to 85_C
Symbol
V+ = 15 V, V- = -3 V VINH = 2.4 V, VINL = 0.8 Ve
Tempa
Minb
Typc
Maxb
Unit
Drain-Source On-Resistance rDS(on) Match Source Off Leakage Current Drain Off Leakage Current Channel On Leakage Current
IS = -10 mA, VD = 0 V ,
Digital Control
Input Voltage High Input Voltage Low Input Current VINH VINL IIN VIN = GND or V+ Full Full Room Full -1 -20 0.05 2.4 0.8 1 20 mA V
Dynamic Characteristics
On State Input Capacitanced Off State Input Capacitanced Off State Output Capacitanced Bandwidth Turn On Time Turn Off Time Charge Injection Off Isolation All Hostile Crosstalk CS(on) CS(off) CD(off) BW tON RL = 1 kW, CL = 35 pF, See Figure 2 tOFF Q OIRR XTALK(AH) CL = 1000 pF, VD = 0 V, See Figure 3 RIN = 75 W, RL = 75 W, f = 5 MHz See Figure 4 RIN = 10 W, RL = 75 W, f = 5 MHz See Figure 5 VS = VD = 0 V VS = 0 V VD = 0 V RL = 50 W, See Figure 6 Room Room Room Room Room Full Room Full Room Room Room 10 4 4 500 50 28 -19 -60 dB -87 70 140 ns 50 85 pC 20 12 12 MHz pF F
Power Supplies
Positive Supply Current Negative Supply Current I+ VIN = 0 V or VIN = 5 V I- Room Full Room Full -6 -9 3.5 -3 6 9
mA
Notes: a. Room = 25_C, Full = as determined by the operating temperature suffix. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Guaranteed by design, not subject to production test. e. VIN = input voltage to perform proper function.
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-3
DG641/642/643
Vishay Siliconix
SPECIFICATIONS FOR DG642
Test Conditions Unless Otherwise Specified Parameter Analog Switch
Analog Signal Ranged VANALOG rDS(on) DrDS(on) IS(off) ID(off) ID(on) VS = 0 V, VD = 10 V VS = 10 V, VD = 0V VS = VD = 0 V V- = -5 V, V+ = 12 V V- = GND, V+ = 12 V Full Full Room Full Room Room Full Room Full Room Full -10 -200 -10 -200 -10 -200 -5 0 5 0.5 -0.04 -0.04 -0.2 8 8 8 9 1 10 200 10 200 10 200 nA A W V
Limits
-40 to 85_C
Symbol
V+ = 15 V, V- = -3 V VINH = 2.4 V, VINL = 0.8 Ve
Tempa
Minb
Typc
Maxb
Unit
Drain-Source On-Resistance rDS(on) Match Source Off Leakage Current Drain Off Leakage Current Channel On Leakage Current
IS = -10 mA, VD = 0 V ,
Digital Control
Input Voltage High Input Voltage Low Input Current VINH VINL IIN VIN = GND or V+ Full Full Room Full -1 -20 0.05 2.4 0.8 1 20 mA V
Dynamic Characteristics
On State Input Capacitanced Off State Input Capacitanced CS(on) CS(off) CD(off) BW tON RL = 1 kW, CL = 35 pF, See Figure 2 Turn Off Time Charge Injection Off Isolation All Hostile Crosstalk XTALK(AH) tOFF Q CL = 1000 pF, VD = 0 V, See Figure 3 RIN = 75 W, RL = 75 W, f = 5 MHz See Figure 4 RIN = 10 W, RL = 75 W, f = 5 MHz See Figure 5 VS = VD = 0 V VS = 0 V VD = 0 V RL = 50 W, See Figure 6 Room Room Room Room Room Full Room Full Room Room Room 19 8 8 500 60 40 -40 -63 dB -85 100 160 ns 60 100 pC 40 20 20 MHz pF F
Off State Output Capacitanced Bandwidth Turn On Time
Power Supplies
Positive Supply Current Negative Supply Current I+ VIN = 0 V or VIN = 5 V I- Room Full Room Full -6 -9 3.5 -3 6 9
mA
Notes: a. Room = 25_C, Full = as determined by the operating temperature suffix. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. Guaranteed by design, not subject to production test. e. VIN = input voltage to perform proper function.
www.vishay.com S FaxBack 408-970-5600
4-4
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
DG641/642/643
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Current vs. Temperature
6 5 4 3 Current (mA) 2 1 0 -1 -2 -3 -4 -5 -55 -35 -15 5 25 45 65 85 105 125 0.1 pA -55 -25 0 25 50 75 100 125 I- 1 pA IGND I D(off), I S(off) 1 nA 10 nA I+ 100 nA
Leakages vs. Temperature
100 pA
10 pA
Temperature (_C)
Temperature (_C)
DG641/643 rDS(on) vs. Drain Voltage
40 V+ = 15 V V- = -3 V 30 125_C 20 r DS(on) - Drain-Source On-Resistance ( W ) r DS(on) - Drain-Source On-Resistance ( W ) 20
DG642 rDS(on) vs. Drain Voltage
V+ = 15 V V- = -3 V 15 125_C 10
25_C
25_C
-55_C 10
-55_C 5
0 -3 -1 1 3 5 7 9 11 VD - Drain Voltage (V)
0 -3 -1 1 3 5 7 9 11 VD - Drain Voltage (V)
On Capacitance
22 20 18 OIRR (dB) 16 14 DG642 12 10 8 6 0 2 4 6 (VD) - (V-) 8 10 12 DG641/643 -30 -20 -10 1 -110 -100 -90 -80 C (pF) -70 -60 -50 -40
Off Isolation
DG641/643
DG642
10 f - Frequency (MHz)
100
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-5
DG641/642/643
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
All Hostile Crosstalk
110 100 90 80 XTALK (dB) Q (pC) 70 DG642 60 50 40 30 20 10 1 10 f - Frequency (MHz) 100 -40 -3 -2 -1 0 1 2 3 4 5 6 7 8 -30 DG642 DG641/643 -20 DG641/643 -10 0 CL = 1000 pF
Charge Injection vs. VD
VD - Drain Voltage (V)
Switching Times vs. Temperature
90 80 V+ - Positive Supply Voltage (V) 70 60 tON t (ns) 50 40 30 20 10 0 -55 10 -25 0 25 50 75 100 125 0 tOFF 18 20
Operating Supply Voltage Range
16
14
Operating Voltage Area
12
-1
-2
-3
-4
-5
-6
Temperature (_C)
V- - Negative Supply (V)
www.vishay.com S FaxBack 408-970-5600
4-6
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
DG641/642/643
Vishay Siliconix
TEST CIRCUITS
+15 V tr <20 ns tf <20 ns 50%
V+ 3V S IN 3V GND V- RL 1 kW CL 35 pF D VO
3V Logic Input
90% Switch Output 0 tON
90%
-3 V
tOFF
FIGURE 2. Switching Time
+15 V DVO
Rg
V+ S IN D VO CL 1000 pF V-
VO
Vg 3V
INX
ON OFF
ON
GND
DVO = measured voltage error due to charge injection The charge injection in coulombs is Q = CL x DVO -3 V
FIGURE 3. Charge Injection
+15 V C
V+
VS Rg = 50 W 0V, 2.4 V
S
D
VO RL
IN GND V- C
-3 V VS VO
Off Isolation = 20 log
FIGURE 4. Off Isolation
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-7
DG641/642/643
Vishay Siliconix
TEST CIRCUITS
DG641
S1 S2 RIN 10 W S3 D1 D2 D3 RL RL Signal Generator 75 W V "1" (a) VOUT S1 RL 75 W RL Signal Generator 75W RIN 10 W S2
DG642
D1 D2 RL V "0" (b) VOUT V VOUT RL 75 W
S4
D4
XTALK(AH) + 20 log10
FIGURE 5. All Hostile Crosstalk - XTALK(AH)
+15 V
V+ S Signal Generator 50 W D V- RL 50 W VOUT
-3 V
FIGURE 6. Bandwidth
APPLICATIONS
Device Description The DG641/642/643 switches offer true bidirectional switching of high frequency analog or digital signals with minimum signal crosstalk, low insertion loss, and negligible non-linearity distortion and group delay. Built on the Siliconix D/CMOS process, these switches provide excellent off-isolation with a bandwidth of around 500 MHz. The silicon-gate D/CMOS processing also yields fast switching speeds. An on-chip regulator circuit maintains TTL input compatibility over the whole operating supply voltage range shown, easing control logic interfacing.
www.vishay.com S FaxBack 408-970-5600
Circuit layout is facilitated by the interchangeability of source and drain terminals.
Frequency Response
A single switch on-channel exhibits both resistance [rDS(on)] and capacitance [CS(on)]. This RC combination has an attenuation effect on the analog signal - which is frequency dependent (like an RC low-pass filter). The -3 dB bandwidth of the DG641/642/643 is typically 500 MHz (into 50 W).
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
4-8
DG641/642/643
Vishay Siliconix
APPLICATIONS
Power Supplies Power supply flexibility is a useful feature of the DG641/642/643 series. It can be operated from a single positive supply (V+) if required (V- connected to ground).
S1 V+ +15 V
+ C1 C2
D1 D2 D3 D4
Note that the analog signal must not exceed V- by more than -0.3 V to prevent forward biasing the substrate p-n junction. The use of a V- supply has a number of advantages: 1. It allows flexibility in analog signal handling, i.e., with V- = -5 V and V+ = 12 V; up to "5-V ac signals can be controlled. The value of on capacitance [CS(on)] may be reduced. A property known as `the body-effect' on the DMOS switch devices causes various parametric effects to occur. One of these effects is the reduction in CS(on) for an increasing V body-source. Note however that to increase V- normally requires V+ to be reduced (since V+ to V- = 21 V max.). A reduction in V+ causes an increase in rDS(on), hence a compromise has to be achieved. It is also useful to note that tests indicate that optimum video linearity performance (e.g., differential phase and gain) occurs when V- is around -3 V. V- eliminates the need to bias the analog signal using potential dividers and large coupling capacitors.
S2 S3 S4
DG64X
V-
GNDs
C1 C1 = 10 mF Tantalum C2 = 0.1 mF Ceramic -3 V +
C2
2.
FIGURE 7. Supply Decoupling
3.
Board Layout
Decoupling It is an established rf design practice to incorporate sufficient bypass capacitors in the circuit to decouple the power supplies to all active devices in the circuit. The dynamic performance of the DG641/642/643 series is adversely affected by poor decoupling of power supply pins. Also, of even more significance, since the substrate of the device is connected to the negative supply, adequate decoupling of this pin is essential. Suitable decoupling capacitors are 1- to 10-mF tantalum bead, plus 10- to 100-nF ceramic or polyester.
PCB layout rules for good high frequency performance must also be observed to achieve the performance boasted by these analog switches. Some tips for minimizing stray effects are:
1.
Use extensive ground planes on double sided PCB, separating adjacent signal paths. Multilayer PCB is even better. Keep signal paths as short as practically possible, with all channel paths of near equal length. Careful arrangement of ground connections is also very important. Star connected system grounds eliminate signal current, flowing through ground path parasitic resistance, from coupling between channels.
2. 3.
Rules: 1. 2. 3. Decoupling capacitors should be incorporated on all power supply pins (V+, V-). (See Figure 7). They should be mounted as close as possible to the device pins. Capacitors should be of a suitable type with good high frequency characteristics - tantalum bead and/or ceramic disc types are adequate.
Figure 8 shows a 4-channel video multiplexer using a DG641.
In Figure 9, two coax cables terminated on 75 W bring two video signals to the DG642 switch. The two drains tied together lower the on-state capacitance. An Si582 video amplifier drives a double terminated 75-W cable. The double terminated coax cable eliminates line reflections.
www.vishay.com S FaxBack 408-970-5600
Document Number: 70058 S-52433--Rev. E, 06-Sep-99
4-9
DG641/642/643
Vishay Siliconix
APPLICATIONS
+15 V V+
CH1 CH2
Si582
75 W 75 W CH3 CH4 75 W 75 W + A=2 - 250 W 250 W DIS 75 W
DG641
V-
-3 V TTL Channel Select
FIGURE 8. 4 by 1 Video Multiplexing Using the DG641
+15 V CH1 CH2 75 W 75 W V+ S1 S2 D1 D2 + A=2 - DIS 250 W 250 W RL 75 W
Si582
75 W VOUT
DG642
V-
TTL Channel Select
-3 V
FIGURE 9. 2-Channel Video Selector Using the DG642
fc SELECT
IN2 S2 S3
1/ 2
D2 D3
C1 C2
DG643
CH1 CH2 CH SELECT
D1 D4 IN1
1/ 2
S1 S4 R1 - LF401 VOUT + R2 1 fc + 2pR C x 3 R3
DG643
FIGURE 10. Active Low Pass Filter with Selectable Inputs and Break Frequencies
www.vishay.com S FaxBack 408-970-5600 Document Number: 70058 S-52433--Rev. E, 06-Sep-99
4-10

▲Up To Search▲

Price & Availability of DG643DJ

	To Download DG643DJ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .